The rapid rise of network monitoring CMOS sensing technology

For image sensor chip manufacturers, it is necessary to improve the image clarity and low-light imaging effects through the advancement of the photosensitive technology, through the improvement of processes, photosensitive units, circuit design, and packaging. As a back-end image processing solution, there is a need for sufficient adaptability, which requires chip manufacturers to accelerate technological innovation and develop product solutions with faster operating frequency, lower chip power consumption, and better cost performance.

The rapid rise of CMOS sensing technology in the past two years, whether in the analog surveillance market or the network monitoring market, is a common development and change: the rapid rise of CMOS image sensing technology, making the monitoring front-end from the past CCD sensor technology dominate the world Pattern, quickly turning to CMOS image sensing technology. A group of manufacturers represented by BYD Microelectronics (BF3003/3108), Aptina (AR0130/MT9M034), Pixelplus (PC1089/3089), and OmniVision (OV8825) have set off a CMOS image sensor at the core of the market. Surveillance camera development boom.

Compared with CCD image sensors, the imaging performance of CMOS in low-light conditions and the performance of high dynamic range performance have always been a major problem for market players. In this regard, Alvin Wong, Senior Marketing Director of Aptina Automotive, Industrial and Medical (AIM) Division, explained that the sensor's low light performance is crucial to accurately presenting images and maintaining the true color of the images. However, a key factor in low light performance is the pixel size because it is directly related to sensitivity. Even if pixel technology continues to advance, the principle of higher sensitivity for larger pixel sizes still applies, but for a given resolution, the larger The pixel size usually means higher system costs because of the need to use higher cost lenses. On the other hand, higher dynamic performance means that the image sensor must have the ability to accurately capture extremely bright and low-light scenes at the same time, that is, to ensure that bright and dark scenes can be properly exposed at the same time. However, high dynamic capabilities also increase the cost and complexity of the system, and generally require additional sensor memory and more sophisticated image processing programs. Therefore, the same challenge faced by various image sensor suppliers at present is to meet the requirements of low light and high dynamic performance, and not to have too high overall system cost.

To improve the sensitivity of CMOS image sensors, minimize read noise, and optimize pixel layout and analog circuit architecture, Aptina uses DR-PixTM technology, which optimizes the difference by using different in-pixel memory and gain. The control of the main noise sources under the light conditions enables the image sensor to achieve superior performance under extremely low light conditions. Aptina's latest 1/3-inch AR0130 megapixel image sensor product integrates DR-PixTM technology to deliver industry-leading low light and dynamic range performance in single exposure applications; another MT9M034 sensor is based on this Basic pixel technology and multiple exposure capture in a single frame period to achieve 115dB high dynamic range performance. It is reported that Aptina will also release new product series with higher cost performance in the second half of this year.

Another obvious trend is that integrating ISPs within the CMOS sensor chip to further compensate for the lack of SoC chips in terms of sensitivity and signal-to-noise ratio is a solution that vendors are currently pushing. Compared with the back-end discrete ISP or DSP solution, Feng Wei pointed out that the two major technical solutions have their own advantages and disadvantages. "The back-end processing SP or DSP scheme can obtain more caches in image processing, so more sophisticated image processing algorithms can be used, processing time and space are more macroscopic, and image effects are better; of course, such programs are often integrated. The degree is slightly lower and the cost is higher. Photosensitive chips and DSP engineers are required to cooperate with each other for development. The development time is slightly longer, and the application cost and production loss are also relatively high.” For the SOC SoC chip integrated in COMS, he believes that due to Considering the heat dissipation and chip area and other issues, the resources for image processing algorithms are limited, but its advantage is that it can provide a highly integrated single-chip solution that facilitates project development, material preparation, and shortens the time to market for products, which can bring high for customers. Cost-effective technical solutions, therefore, manufacturers can choose different technology development routes based on actual application requirements.